Matsayin bincike na da'irar haɗakar SiC

Bambanta da na'urorin S1C masu rarrabe waɗanda ke bin babban ƙarfin lantarki, babban ƙarfi, mita mai yawa da halayen zafin jiki mai yawa, burin bincike na da'irar haɗakar SiC shine galibi don samun da'irar dijital mai zafi mai yawa don da'irar sarrafa ICs mai hankali. Ganin cewa da'irar haɗakar SiC don filin lantarki na ciki tana da ƙasa sosai, don haka tasirin lahani na microtubules zai ragu sosai, wannan shine farkon guntu na guntu mai aiki na SiC mai haɗakar monolithic, ainihin samfurin da aka gama kuma an ƙaddara ta hanyar yawan amfanin ƙasa ya fi na lahani na microtubules girma, saboda haka, bisa ga samfurin samar da SiC da kayan Si da CaAs a bayyane yake ya bambanta. Chip ɗin ya dogara ne akan fasahar rage ƙarfin NMOSFET. Babban dalili shine cewa ingantaccen motsi mai ɗaukar kaya na tashar juyawa SiC MOSFETs ya yi ƙasa sosai. Domin inganta motsi na saman Sic, yana da mahimmanci a inganta da inganta tsarin iskar shaka na Sic.

Jami'ar Purdue ta yi aiki tukuru kan da'irori masu haɗa SiC. A shekarar 1992, an samar da masana'antar cikin nasara bisa ga da'irar haɗin dijital mai lamba 6H-SIC NMOSFETs ta hanyar amfani da na'urar juyawa ta 6H-SIC NMOSFETs. Chip ɗin ya ƙunshi da'irar ƙofa, ko ta ƙofa, ta ƙofa, ta binary, da ta rabin adder kuma yana iya aiki yadda ya kamata a zafin jiki na 25°C zuwa 300°C. A shekarar 1995, an ƙera jirgin farko na SiC MESFET Ics ta amfani da fasahar keɓewa ta vanadium. Ta hanyar sarrafa adadin vanadium da aka allura daidai, ana iya samun SiC mai hana ruwa shiga.

A cikin da'irori na dabaru na dijital, da'irori na CMOS sun fi kyau fiye da da'irori na NMOS. A watan Satumba na 1996, an ƙera da'irar dijital ta farko mai lamba 6H-SIC CMOS. Na'urar tana amfani da allurar N-order da deposition oxide Layer, amma saboda wasu matsalolin tsari, ƙarfin wutar lantarki na guntu na PMOSFETs ya yi yawa. A watan Maris na 1997 lokacin ƙera da'irar SiC CMOS ta ƙarni na biyu. An karɓi fasahar allurar tarko na P da kuma matakin thermal growth oxide Layer. Ƙarfin wutar lantarki na PMOSEFTs da aka samu ta hanyar inganta tsari shine kusan -4.5V. Duk da'irori akan guntu suna aiki da kyau a zafin ɗaki har zuwa 300°C kuma ana amfani da wutar lantarki ɗaya, wanda zai iya kasancewa ko'ina daga 5 zuwa 15V.

Tare da inganta ingancin wafer ɗin substrate, za a samar da ƙarin aiki da kuma ƙarin yawan amfanin ƙasa da aka haɗa. Duk da haka, lokacin da aka magance matsalolin kayan SiC da tsarin aiki, amincin na'ura da fakitin zai zama babban abin da ke shafar aikin da'irori masu haɗa SiC masu zafi mai yawa.